mirror of
https://github.com/shadps4-emu/shadPS4.git
synced 2025-04-28 21:38:03 +03:00
cb6b21de1f
* gnm_driver: added `sceGnmRegisterOwner` and `sceGnmRegisterResource` * video_out: `sceVideoOutGetDeviceCapabilityInfo` for sdk runtime * gnm_driver: correct vqid index range * amdgpu: indirect buffer, release mem and some additional irq modes * amdgpu: added ASC commands processor * shader_recompiler: added support for fetch instance id * amdgpu: classic bitfields for T# representation (debugging experience) * renderer_vulkan: skip zero sized VBs from binding * texture_cache: image upload logic moved into `Image` object * gnm_driver: `sceGnmDingDong` implementation * texture_cache: `Image` usage flags moved; correct VO buffer pitch
86 lines
3 KiB
C++
86 lines
3 KiB
C++
// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include <boost/container/static_vector.hpp>
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#include "shader_recompiler/frontend/decode.h"
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#include "shader_recompiler/frontend/fetch_shader.h"
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namespace Shader::Gcn {
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/**
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* s_load_dwordx4 s[8:11], s[2:3], 0x00
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* s_load_dwordx4 s[12:15], s[2:3], 0x04
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* s_load_dwordx4 s[16:19], s[2:3], 0x08
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* s_waitcnt lgkmcnt(0)
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* buffer_load_format_xyzw v[4:7], v0, s[8:11], 0 idxen
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* buffer_load_format_xyz v[8:10], v0, s[12:15], 0 idxen
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* buffer_load_format_xy v[12:13], v0, s[16:19], 0 idxen
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* s_waitcnt 0
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* s_setpc_b64 s[0:1]
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* s_load_dwordx4 s[4:7], s[2:3], 0x0
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* s_waitcnt lgkmcnt(0)
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* buffer_load_format_xyzw v[4:7], v0, s[4:7], 0 idxen
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* s_load_dwordx4 s[4:7], s[2:3], 0x8
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* s_waitcnt lgkmcnt(0)
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* buffer_load_format_xyzw v[8:11], v0, s[4:7], 0 idxen
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* s_waitcnt vmcnt(0) & expcnt(0) & lgkmcnt(0)
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* s_setpc_b64 s[0:1]
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* A normal fetch shader looks like the above, the instructions are generated
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* using input semantics on cpu side. Load instructions can either be separate or interleaved
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* We take the reverse way, extract the original input semantics from these instructions.
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**/
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std::vector<VertexAttribute> ParseFetchShader(const u32* code) {
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std::vector<VertexAttribute> attributes;
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GcnCodeSlice code_slice(code, code + std::numeric_limits<u32>::max());
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GcnDecodeContext decoder;
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struct VsharpLoad {
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u32 dword_offset{};
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s32 base_sgpr{};
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s32 dst_reg{-1};
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};
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boost::container::static_vector<VsharpLoad, 16> loads;
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u32 semantic_index = 0;
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while (!code_slice.atEnd()) {
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const auto inst = decoder.decodeInstruction(code_slice);
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if (inst.opcode == Opcode::S_SETPC_B64) {
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break;
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}
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if (inst.inst_class == InstClass::ScalarMemRd) {
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loads.emplace_back(inst.control.smrd.offset, inst.src[0].code * 2, inst.dst[0].code);
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continue;
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}
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if (inst.inst_class == InstClass::VectorMemBufFmt) {
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// SRSRC is in units of 4 SPGRs while SBASE is in pairs of SGPRs
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const u32 base_sgpr = inst.src[2].code * 4;
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// Find the load instruction that loaded the V# to the SPGR.
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// This is so we can determine its index in the vertex table.
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const auto it = std::ranges::find_if(
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loads, [&](VsharpLoad& load) { return load.dst_reg == base_sgpr; });
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auto& attrib = attributes.emplace_back();
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attrib.semantic = semantic_index++;
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attrib.dest_vgpr = inst.src[1].code;
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attrib.num_elements = inst.control.mubuf.count;
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attrib.sgpr_base = it->base_sgpr;
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attrib.dword_offset = it->dword_offset;
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// Store instance id rate
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attrib.instance_data = inst.src[0].code;
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// Mark load as used.
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it->dst_reg = -1;
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}
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}
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return attributes;
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}
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} // namespace Shader::Gcn
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