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Utils: Remove AVX10-256 detection (#16904)
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- Intel recently removed 256b AVX10 from the AVX10 spec.
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2 changed files with 0 additions and 48 deletions
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@ -278,17 +278,6 @@ bool utils::has_avx10()
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#endif
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#endif
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}
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}
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bool utils::has_avx10_512()
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{
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#if defined(ARCH_X64)
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// AVX10 with 512 wide vectors
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static const bool g_value = has_avx10() && get_cpuid(24, 0)[2] & 0x40000;
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return g_value;
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#else
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return false;
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#endif
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}
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u32 utils::avx10_isa_version()
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u32 utils::avx10_isa_version()
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{
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{
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#if defined(ARCH_X64)
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#if defined(ARCH_X64)
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@ -310,28 +299,6 @@ u32 utils::avx10_isa_version()
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#endif
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#endif
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}
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}
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bool utils::has_avx512_256()
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{
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#if defined(ARCH_X64)
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// Either AVX10 or AVX512 implies support for 256-bit length AVX-512 SKL-X tier instructions
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static const bool g_value = (has_avx512() || has_avx10());
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return g_value;
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#else
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return false;
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#endif
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}
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bool utils::has_avx512_icl_256()
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{
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#if defined(ARCH_X64)
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// Check for AVX512_ICL or check for AVX10, together with GFNI, VAES, and VPCLMULQDQ, implies support for the same instructions that AVX-512_icl does at 256 bit length
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static const bool g_value = (has_avx512_icl() || (has_avx10() && get_cpuid(7, 0)[2] & 0x00000700));
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return g_value;
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#else
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return false;
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#endif
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}
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bool utils::has_xop()
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bool utils::has_xop()
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{
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{
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#if defined(ARCH_X64)
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#if defined(ARCH_X64)
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@ -536,15 +503,6 @@ std::string utils::get_system_info()
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{
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{
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const u32 avx10_version = avx10_isa_version();
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const u32 avx10_version = avx10_isa_version();
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fmt::append(result, "10.%d", avx10_version);
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fmt::append(result, "10.%d", avx10_version);
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if (has_avx10_512())
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{
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result += "-512";
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}
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else
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{
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result += "-256";
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}
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}
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}
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else if (has_avx512())
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else if (has_avx512())
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{
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{
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@ -29,14 +29,8 @@ namespace utils
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bool has_avx10();
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bool has_avx10();
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bool has_avx10_512();
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u32 avx10_isa_version();
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u32 avx10_isa_version();
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bool has_avx512_256();
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bool has_avx512_icl_256();
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bool has_xop();
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bool has_xop();
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bool has_clwb();
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bool has_clwb();
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