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The PowerPC CPU has bits in MSR (DR and IR) which control whether addresses are translated. We should respect these instead of mixing physical addresses and translated addresses into the same address space. This is mostly mass-renaming calls to memory accesses APIs from places which expect address translation to use a different version from those which do not expect address translation. This does very little on its own, but it's the first step to a correct BAT implementation.
252 lines
5.5 KiB
C++
252 lines
5.5 KiB
C++
// Copyright 2013 Dolphin Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#include <algorithm>
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#include <cinttypes>
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#include <string>
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#ifdef _WIN32
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#include <windows.h>
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#else
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#include "Common/PerformanceCounter.h"
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#endif
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#include "Core/ConfigManager.h"
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#include "Core/HW/Memmap.h"
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#include "Core/PowerPC/JitInterface.h"
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#include "Core/PowerPC/PPCSymbolDB.h"
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#include "Core/PowerPC/Profiler.h"
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#include "Core/PowerPC/JitCommon/JitBase.h"
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#if _M_X86
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#include "Core/PowerPC/Jit64/Jit.h"
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#include "Core/PowerPC/Jit64/Jit64_Tables.h"
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#include "Core/PowerPC/Jit64IL/JitIL.h"
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#include "Core/PowerPC/Jit64IL/JitIL_Tables.h"
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#endif
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#if _M_ARM_32
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#include "Core/PowerPC/JitArm32/Jit.h"
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#include "Core/PowerPC/JitArm32/JitArm_Tables.h"
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#endif
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#if _M_ARM_64
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#include "Core/PowerPC/JitArm64/Jit.h"
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#include "Core/PowerPC/JitArm64/JitArm64_Tables.h"
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#endif
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static bool bFakeVMEM = false;
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bool bMMU = false;
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namespace JitInterface
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{
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void DoState(PointerWrap &p)
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{
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if (jit && p.GetMode() == PointerWrap::MODE_READ)
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jit->GetBlockCache()->Clear();
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}
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CPUCoreBase *InitJitCore(int core)
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{
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bMMU = SConfig::GetInstance().m_LocalCoreStartupParameter.bMMU;
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bFakeVMEM = !bMMU;
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CPUCoreBase *ptr = nullptr;
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switch (core)
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{
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#if _M_X86
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case 1:
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{
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ptr = new Jit64();
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break;
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}
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case 2:
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{
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ptr = new JitIL();
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break;
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}
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#endif
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#if _M_ARM_32
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case 3:
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{
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ptr = new JitArm();
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break;
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}
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#endif
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#if _M_ARM_64
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case 4:
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{
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ptr = new JitArm64();
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break;
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}
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#endif
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default:
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{
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PanicAlert("Unrecognizable cpu_core: %d", core);
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jit = nullptr;
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return nullptr;
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}
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}
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jit = static_cast<JitBase*>(ptr);
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jit->Init();
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return ptr;
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}
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void InitTables(int core)
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{
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switch (core)
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{
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#if _M_X86
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case 1:
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{
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Jit64Tables::InitTables();
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break;
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}
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case 2:
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{
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JitILTables::InitTables();
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break;
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}
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#endif
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#if _M_ARM_32
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case 3:
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{
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JitArmTables::InitTables();
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break;
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}
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#endif
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#if _M_ARM_64
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case 4:
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{
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JitArm64Tables::InitTables();
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break;
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}
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#endif
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default:
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{
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PanicAlert("Unrecognizable cpu_core: %d", core);
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break;
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}
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}
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}
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CPUCoreBase *GetCore()
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{
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return jit;
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}
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void WriteProfileResults(const std::string& filename)
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{
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// Can't really do this with no jit core available
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if (!jit)
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return;
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std::vector<BlockStat> stats;
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stats.reserve(jit->GetBlockCache()->GetNumBlocks());
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u64 cost_sum = 0;
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u64 timecost_sum = 0;
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u64 countsPerSec;
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QueryPerformanceFrequency((LARGE_INTEGER*)&countsPerSec);
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for (int i = 0; i < jit->GetBlockCache()->GetNumBlocks(); i++)
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{
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const JitBlock *block = jit->GetBlockCache()->GetBlock(i);
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// Rough heuristic. Mem instructions should cost more.
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u64 cost = block->originalSize * (block->runCount / 4);
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u64 timecost = block->ticCounter;
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// Todo: tweak.
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if (block->runCount >= 1)
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stats.emplace_back(i, cost);
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cost_sum += cost;
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timecost_sum += timecost;
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}
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sort(stats.begin(), stats.end());
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File::IOFile f(filename, "w");
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if (!f)
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{
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PanicAlert("Failed to open %s", filename.c_str());
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return;
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}
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fprintf(f.GetHandle(), "origAddr\tblkName\tcost\ttimeCost\tpercent\ttimePercent\tOvAllinBlkTime(ms)\tblkCodeSize\n");
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for (auto& stat : stats)
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{
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const JitBlock *block = jit->GetBlockCache()->GetBlock(stat.blockNum);
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if (block)
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{
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std::string name = g_symbolDB.GetDescription(block->originalAddress);
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double percent = 100.0 * (double)stat.cost / (double)cost_sum;
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double timePercent = 100.0 * (double)block->ticCounter / (double)timecost_sum;
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fprintf(f.GetHandle(), "%08x\t%s\t%" PRIu64 "\t%" PRIu64 "\t%.2f\t%.2f\t%.2f\t%i\n",
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block->originalAddress, name.c_str(), stat.cost,
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block->ticCounter, percent, timePercent,
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(double)block->ticCounter*1000.0/(double)countsPerSec, block->codeSize);
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}
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}
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}
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bool HandleFault(uintptr_t access_address, SContext* ctx)
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{
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return jit->HandleFault(access_address, ctx);
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}
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void ClearCache()
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{
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if (jit)
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jit->ClearCache();
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}
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void ClearSafe()
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{
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// This clear is "safe" in the sense that it's okay to run from
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// inside a JIT'ed block: it clears the instruction cache, but not
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// the JIT'ed code.
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// TODO: There's probably a better way to handle this situation.
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if (jit)
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jit->GetBlockCache()->Clear();
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}
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void InvalidateICache(u32 address, u32 size, bool forced)
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{
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if (jit)
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jit->GetBlockCache()->InvalidateICache(address, size, forced);
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}
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void CompileExceptionCheck(ExceptionType type)
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{
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if (!jit)
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return;
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std::unordered_set<u32>* exception_addresses = nullptr;
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switch (type)
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{
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case ExceptionType::EXCEPTIONS_FIFO_WRITE:
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exception_addresses = &jit->js.fifoWriteAddresses;
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break;
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case ExceptionType::EXCEPTIONS_PAIRED_QUANTIZE:
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exception_addresses = &jit->js.pairedQuantizeAddresses;
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break;
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}
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if (PC != 0 && (exception_addresses->find(PC)) == (exception_addresses->end()))
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{
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if (type == ExceptionType::EXCEPTIONS_FIFO_WRITE)
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{
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// Check in case the code has been replaced since: do we need to do this?
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int optype = GetOpInfo(PowerPC::HostRead_U32(PC))->type;
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if (optype != OPTYPE_STORE && optype != OPTYPE_STOREFP && (optype != OPTYPE_STOREPS))
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return;
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}
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exception_addresses->insert(PC);
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// Invalidate the JIT block so that it gets recompiled with the external exception check included.
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jit->GetBlockCache()->InvalidateICache(PC, 4, true);
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}
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}
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void Shutdown()
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{
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if (jit)
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{
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jit->Shutdown();
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delete jit;
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jit = nullptr;
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}
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}
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}
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