mirror of
https://github.com/dolphin-emu/dolphin.git
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DSPLLE - 0xa100 figured out = abs(), small mul fix, cleaning, some extra comments
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5216 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
parent
4f56d8144b
commit
503bf545a3
9 changed files with 161 additions and 256 deletions
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@ -74,9 +74,9 @@ void nr(const UDSPInstruction& opc) {
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writeToBackLog(0, reg, dsp_increase_addr_reg(reg, (s16)g_dsp.r[DSP_REG_IX0 + reg]));
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}
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// MV $axD, $acS.l
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// MV $axD.D, $acS.S
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// xxxx xxxx 0001 ddss
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// Move value of $acS.l to the $axD.l.
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// Move value of $acS.S to the $axD.D.
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void mv(const UDSPInstruction& opc)
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{
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u8 sreg = (opc.hex & 0x3) + DSP_REG_ACL0;
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@ -90,10 +90,10 @@ void mv(const UDSPInstruction& opc)
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writeToBackLog(0, dreg + DSP_REG_AXL0, g_dsp.r[sreg]);
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}
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// S @$D, $acD.l
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// S @$arD, $acS.S
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// xxxx xxxx 001s s0dd
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// Store value of $(acS.l) in the memory pointed by register $D.
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// Post increment register $D.
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// Store value of $acS.S in the memory pointed by register $arD.
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// Post increment register $arD.
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void s(const UDSPInstruction& opc)
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{
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u8 dreg = opc.hex & 0x3;
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@ -103,24 +103,23 @@ void s(const UDSPInstruction& opc)
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writeToBackLog(0, dreg, dsp_increment_addr_reg(dreg));
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}
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// SN @$D, $acD.l
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// SN @$arD, $acS.S
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// xxxx xxxx 001s s1dd
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// Store value of register $acS in the memory pointed by register $D.
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// Add indexing register $ixD to register $D.
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// Store value of register $acS.S in the memory pointed by register $arD.
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// Add indexing register $ixD to register $arD.
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void sn(const UDSPInstruction& opc)
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{
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u8 dreg = opc.hex & 0x3;
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u8 sreg = ((opc.hex >> 3) & 0x3) + DSP_REG_ACL0;
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dsp_dmem_write(g_dsp.r[dreg], g_dsp.r[sreg]);
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writeToBackLog(0, dreg, dsp_increase_addr_reg(dreg, (s16)g_dsp.r[DSP_REG_IX0 + dreg]));
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}
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// L axD.l, @$S
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// L $axD.D, @$arS
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// xxxx xxxx 01dd d0ss
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// Load $axD with value from memory pointed by register $S.
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// Post increment register $S.
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// Load $axD.D/$acD.D with value from memory pointed by register $arS.
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// Post increment register $arS.
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void l(const UDSPInstruction& opc)
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{
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u8 sreg = opc.hex & 0x3;
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@ -141,10 +140,10 @@ void l(const UDSPInstruction& opc)
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}
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}
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// LN axD.l, @$S
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// LN $axD.D, @$arS
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// xxxx xxxx 01dd d0ss
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// Load $axD with value from memory pointed by register $S.
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// Add indexing register register $ixS to register $S.
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// Load $axD.D/$acD.D with value from memory pointed by register $arS.
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// Add indexing register register $ixS to register $arS.
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void ln(const UDSPInstruction& opc)
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{
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u8 sreg = opc.hex & 0x3;
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@ -165,161 +164,159 @@ void ln(const UDSPInstruction& opc)
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}
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}
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// LS $axD.l, $acS.m
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// LS $axD.D, $acS.m
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// xxxx xxxx 10dd 000s
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// Load register $axD.l with value from memory pointed by register
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// Load register $axD.D with value from memory pointed by register
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// $ar0. Store value from register $acS.m to memory location pointed by
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// register $ar3. Increment both $ar0 and $ar3.
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void ls(const UDSPInstruction& opc)
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{
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u8 areg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 sreg = DSP_REG_AR3;
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u8 sreg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc.hex >> 4) & 0x3) + DSP_REG_AXL0;
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dsp_dmem_write(g_dsp.r[sreg], g_dsp.r[areg]);
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dsp_dmem_write(g_dsp.r[DSP_REG_AR3], g_dsp.r[sreg]);
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writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r[DSP_REG_AR0]));
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writeToBackLog(1, sreg, dsp_increment_addr_reg(sreg));
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writeToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
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writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
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}
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// LSN $acD.l, $acS.m
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// LSN $axD.D, $acS.m
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// xxxx xxxx 10dd 010s
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// Load register $acD.l with value from memory pointed by register
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// Load register $axD.D with value from memory pointed by register
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// $ar0. Store value from register $acS.m to memory location pointed by
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// register $ar3. Add corresponding indexing register $ix0 to addressing
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// register $ar0 and increment $ar3.
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void lsn(const UDSPInstruction& opc)
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{
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u8 areg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 sreg = DSP_REG_AR3;
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u8 sreg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc.hex >> 4) & 0x3) + DSP_REG_AXL0;
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dsp_dmem_write(g_dsp.r[sreg], g_dsp.r[areg]);
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dsp_dmem_write(g_dsp.r[DSP_REG_AR3], g_dsp.r[sreg]);
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writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r[DSP_REG_AR0]));
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writeToBackLog(1, sreg, dsp_increment_addr_reg(sreg));
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writeToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
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writeToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp.r[DSP_REG_IX0]));
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}
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// LSM $acD.l, $acS.m
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// LSM $axD.D, $acS.m
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// xxxx xxxx 10dd 100s
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// Load register $acD.l with value from memory pointed by register
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// Load register $axD.D with value from memory pointed by register
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// $ar0. Store value from register $acS.m to memory location pointed by
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// register $ar3. Add corresponding indexing register $ix3 to addressing
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// register $ar3 and increment $ar0.
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void lsm(const UDSPInstruction& opc)
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{
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u8 areg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 sreg = DSP_REG_AR3;
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u8 sreg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc.hex >> 4) & 0x3) + DSP_REG_AXL0;
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dsp_dmem_write(g_dsp.r[sreg], g_dsp.r[areg]);
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dsp_dmem_write(g_dsp.r[DSP_REG_AR3], g_dsp.r[sreg]);
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writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r[DSP_REG_AR0]));
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writeToBackLog(1, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r[DSP_REG_IX0 + sreg]));
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writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
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writeToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r[DSP_REG_IX0 + DSP_REG_AR3]));
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writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
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}
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// LSMN $acD.l, $acS.m
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// LSMN $axD.D, $acS.m
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// xxxx xxxx 10dd 110s
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// Load register $acD.l with value from memory pointed by register
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// Load register $axD.D with value from memory pointed by register
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// $ar0. Store value from register $acS.m to memory location pointed by
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// register $ar3. Add corresponding indexing register $ix0 to addressing
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// register $ar0 and add corresponding indexing register $ix3 to addressing
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// register $ar3.
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void lsnm(const UDSPInstruction& opc)
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{
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u8 areg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 sreg = DSP_REG_AR3;
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u8 sreg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc.hex >> 4) & 0x3) + DSP_REG_AXL0;
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dsp_dmem_write(g_dsp.r[sreg], g_dsp.r[areg]);
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dsp_dmem_write(g_dsp.r[DSP_REG_AR3], g_dsp.r[sreg]);
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writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r[DSP_REG_AR0]));
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writeToBackLog(1, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r[DSP_REG_IX0 + sreg]));
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writeToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r[DSP_REG_IX0 + DSP_REG_AR3]));
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writeToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp.r[DSP_REG_IX0]));
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}
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// SL $acS.m, $acD.l
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// SL $acS.m, $axD.D
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// xxxx xxxx 10dd 001s
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// Store value from register $acS.m to memory location pointed by register
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// $ar0. Load register $acD.l with value from memory pointed by register
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// $ar0. Load register $axD.D with value from memory pointed by register
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// $ar3. Increment both $ar0 and $ar3.
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void sl(const UDSPInstruction& opc)
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{
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u8 areg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 sreg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc.hex >> 4) & 0x3) + DSP_REG_AXL0;
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const u8 sreg = DSP_REG_AR3;
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dsp_dmem_write(g_dsp.r[DSP_REG_AR0], g_dsp.r[areg]);
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dsp_dmem_write(g_dsp.r[DSP_REG_AR0], g_dsp.r[sreg]);
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writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r[sreg]));
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writeToBackLog(1, sreg, dsp_increment_addr_reg(sreg));
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writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
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writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r[DSP_REG_AR3]));
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writeToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
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writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
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}
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// SLN $acS.m, $acD.l
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// SLN $acS.m, $axD.D
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// xxxx xxxx 10dd 011s
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// Store value from register $acS.m to memory location pointed by register
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// $ar0. Load register $acD.l with value from memory pointed by register
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// $ar0. Load register $axD.D with value from memory pointed by register
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// $ar3. Add corresponding indexing register $ix0 to addressing register $ar0
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// and increment $ar3.
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void sln(const UDSPInstruction& opc)
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{
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u8 areg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 sreg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc.hex >> 4) & 0x3) + DSP_REG_AXL0;
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const u8 sreg = DSP_REG_AR3;
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dsp_dmem_write(g_dsp.r[DSP_REG_AR0], g_dsp.r[areg]);
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dsp_dmem_write(g_dsp.r[DSP_REG_AR0], g_dsp.r[sreg]);
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writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r[sreg]));
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writeToBackLog(1, sreg, dsp_increment_addr_reg(sreg));
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writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r[DSP_REG_AR3]));
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writeToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
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writeToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp.r[DSP_REG_IX0]));
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}
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// SLM $acS.m, $acD.l
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// SLM $acS.m, $axD.D
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// xxxx xxxx 10dd 101s
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// Store value from register $acS.m to memory location pointed by register
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// $ar0. Load register $acD.l with value from memory pointed by register
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// $ar0. Load register $axD.D with value from memory pointed by register
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// $ar3. Add corresponding indexing register $ix3 to addressing register $ar3
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// and increment $ar0.
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void slm(const UDSPInstruction& opc)
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{
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u8 areg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 sreg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc.hex >> 4) & 0x3) + DSP_REG_AXL0;
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const u8 sreg = DSP_REG_AR3;
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dsp_dmem_write(g_dsp.r[DSP_REG_AR0], g_dsp.r[areg]);
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dsp_dmem_write(g_dsp.r[DSP_REG_AR0], g_dsp.r[sreg]);
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writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r[sreg]));
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writeToBackLog(1, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r[DSP_REG_IX0 + sreg]));
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writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
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writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r[DSP_REG_AR3]));
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writeToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r[DSP_REG_IX0 + DSP_REG_AR3]));
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writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
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}
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// SLMN $acS.m, $acD.l
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// SLMN $acS.m, $axD.D
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// xxxx xxxx 10dd 111s
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// Store value from register $acS.m to memory location pointed by register
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// $ar0. Load register $acD.l with value from memory pointed by register
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// $ar0. Load register $axD.D with value from memory pointed by register
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// $ar3. Add corresponding indexing register $ix0 to addressing register $ar0
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// and add corresponding indexing register $ix3 to addressing register $ar3.
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void slnm(const UDSPInstruction& opc)
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{
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u8 areg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 sreg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc.hex >> 4) & 0x3) + DSP_REG_AXL0;
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const u8 sreg = DSP_REG_AR3;
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dsp_dmem_write(g_dsp.r[DSP_REG_AR0], g_dsp.r[areg]);
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dsp_dmem_write(g_dsp.r[DSP_REG_AR0], g_dsp.r[sreg]);
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writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r[sreg]));
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writeToBackLog(1, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r[DSP_REG_IX0 + sreg]));
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writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r[DSP_REG_AR3]));
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writeToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r[DSP_REG_IX0 + DSP_REG_AR3]));
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writeToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp.r[DSP_REG_IX0]));
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}
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// Not in duddie's doc
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// LD $ax0.d $ax1.r @$arS
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// LD $ax0.d, $ax1.r, @$arS
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// xxxx xxxx 11dr 00ss
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// example for "nx'ld $AX0.L, $AX1.L, @$AR3"
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// Loads the word pointed by AR0 to AX0.H, then loads the word pointed by AR3 to AX0.L.
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// Increments AR0 and AR3.
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// If AR0 and AR3 point into the same memory page (upper 6 bits of addr are the same -> games are not doing that!)
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// then the value pointed by AR0 is loaded to BOTH AX0.H and AX0.L.
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// If AR0 points into an invalid memory page (ie 0x2000), then AX0.H keeps its old value. (not implemented yet)
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// If AR3 points into an invalid memory page, then AX0.L gets the same value as AX0.H. (not implemented yet)
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void ld(const UDSPInstruction& opc)
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{
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u8 dreg = (opc.hex >> 5) & 0x1;
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@ -349,8 +346,7 @@ void ld(const UDSPInstruction& opc)
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writeToBackLog(3, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
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}
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// Not in duddie's doc
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// LDN $ax0.d $ax1.r @$arS
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// LDN $ax0.d, $ax1.r, @$arS
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// xxxx xxxx 11dr 01ss
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void ldn(const UDSPInstruction& opc)
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{
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@ -381,9 +377,7 @@ void ldn(const UDSPInstruction& opc)
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writeToBackLog(3, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
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}
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// Not in duddie's doc
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// LDM $ax0.d $ax1.r @$arS
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// LDM $ax0.d, $ax1.r, @$arS
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// xxxx xxxx 11dr 10ss
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void ldm(const UDSPInstruction& opc)
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{
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@ -415,8 +409,7 @@ void ldm(const UDSPInstruction& opc)
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dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r[DSP_REG_IX0 + DSP_REG_AR3]));
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}
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// Not in duddie's doc
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// LDNM $ax0.d $ax1.r @$arS
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// LDNM $ax0.d, $ax1.r, @$arS
|
||||
// xxxx xxxx 11dr 11ss
|
||||
void ldnm(const UDSPInstruction& opc)
|
||||
{
|
||||
|
@ -491,7 +484,7 @@ void zeroWriteBackLog()
|
|||
}
|
||||
|
||||
//needed for 0x3... (at least)..., + clrl
|
||||
//ex. corner case -> 0x4060: main opcode modifies .m, and extended .l -> .l shoudnt be zeroed because of .m write...
|
||||
//ex. corner case -> 0x3060: main opcode modifies .m, and extended .l -> .l shoudnt be zeroed because of .m write...
|
||||
void zeroWriteBackLogPreserveAcc(u8 acc)
|
||||
{
|
||||
for (int i = 0; writeBackLogIdx[i] != -1; i++) {
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue