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Enables larger memory size for Namco System 256 arcade machines while keeping the standard for PS2 games.
92 lines
1.3 KiB
C++
92 lines
1.3 KiB
C++
#ifndef _PS2CONST_H_
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#define _PS2CONST_H_
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namespace PS2
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{
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enum
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{
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EE_RAM_SIZE = 0x04000000,
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EE_BASE_RAM_SIZE = 0x02000000,
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EE_EXT_RAM_SIZE = 0x04000000,
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};
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enum
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{
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EE_CLOCK_FREQ = 0x11940000
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};
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enum
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{
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EE_BIOS_ADDR = 0x1FC00000,
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EE_BIOS_SIZE = 0x00400000,
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};
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enum
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{
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//Technically, SPR isn't mapped in the EE's physical address space,
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//but we map it after RAM for convenience.
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EE_SPR_ADDR = EE_RAM_SIZE,
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EE_SPR_SIZE = 0x00004000,
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};
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enum
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{
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GS_NTSC_HSYNC_FREQ = 15734,
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GS_PAL_HSYNC_FREQ = 15625
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};
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enum
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{
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GPU_DOT_CLOCK_FREQ = 13305600 //Ref: NO$PSX documentation
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};
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enum
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{
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IOP_RAM_SIZE = 0x00400000,
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IOP_BASE_RAM_SIZE = 0x00200000,
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IOP_EXT_RAM_SIZE = 0x00400000,
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};
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enum
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{
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IOP_SCRATCH_ADDR = 0x1F800000,
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IOP_SCRATCH_SIZE = 0x00001000
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};
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enum
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{
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IOP_CLOCK_BASE_FREQ = (44100 * 256 * 3),
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IOP_CLOCK_OVER_FREQ = (48000 * 256 * 3)
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};
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enum
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{
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VUMEM0ADDR = 0x11004000,
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VUMEM0SIZE = 0x00001000,
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};
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enum
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{
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MICROMEM0ADDR = 0x11000000,
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MICROMEM0SIZE = 0x00001000,
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};
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enum
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{
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VUMEM1ADDR = 0x1100C000,
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VUMEM1SIZE = 0x00004000,
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};
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enum
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{
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MICROMEM1ADDR = 0x11008000,
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MICROMEM1SIZE = 0x00004000,
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};
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enum
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{
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SPU_RAM_SIZE = 0x00200000,
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};
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}
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#endif
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