41 commits

Author	SHA1	Message	Date
Jean-Philip Desjardins	dd286d3fa3	Add missing logs.	2021-09-01 09:31:30 -04:00
Björn Gerdau	17b1e8226a	Add missing state persisting for some DMAC registers	2021-05-26 14:53:18 +02:00
Björn Gerdau	f3a05895b5	Add some missing EE DMAC ASR register interactions	2020-11-06 19:06:59 +01:00
Jean-Philip Desjardins	71a45f1280	Fix code style.	2020-07-17 17:02:25 -04:00
Jean-Philip Desjardins	bc91b8c64d	Add missing D1_ASRx registers.	2020-07-13 21:24:42 -04:00
Jean-Philip Desjardins	80d83ed96f	Add log. ... (cherry picked from commit c980bf0b0f09f433ff64654b07a12b2a723eb9c3)	2020-02-10 21:40:09 -05:00
Jean-Philip Desjardins	2076edf3c0	Fix Linux build.	2019-08-17 13:51:31 -04:00
Jean-Philip Desjardins	25cf0a8a5d	Add missing register reads.	2019-08-07 07:31:41 -04:00
Jean-Philip Desjardins	e5ae547e66	Move saved state helper classes to a subfolder.	2019-02-06 19:04:51 -05:00
Jean-Philip Desjardins	d5f88a9222	Rename source chain DMAtag ID enums.	2018-05-30 13:19:49 -04:00
Jean-Philip Desjardins	4785dab2de	Rename some of the log's names.	2018-05-25 12:38:51 -04:00
Jean-Philip Desjardins	0f2fcc31bb	Use Warn function.	2018-05-25 12:24:51 -04:00
Clang-Format	acf75535ec	Clang format	2018-04-30 21:01:23 +01:00
Jean-Philip Desjardins	8a85393f74	Allow reading from D2_CHCR + 2.	2018-04-22 10:04:34 -04:00
Jean-Philip Desjardins	93a95f37bc	Allow reading from register offset.	2017-08-09 23:06:26 -04:00
Jean-Philip Desjardins	d827742487	Cleanup.	2017-08-09 23:06:26 -04:00
Jean-Philip Desjardins	c08c079c35	Add D_STADR register.	2017-08-09 23:06:26 -04:00
Jean-Philip Desjardins	c42b1d3d21	Remove some hard values.	2017-08-09 23:06:04 -04:00
Mahmood(Thunder07)	97c229ec98	Cleanup ... Silence:"warning: '0' flag ignored with precision and ‘%X’ gnu_printf format"	2017-05-29 06:01:32 +01:00
Jean-Philip Desjardins	133a7aad97	Save D_ENABLE state.	2017-03-26 18:35:50 -04:00
Jean-Philip Desjardins	d37533cb22	Add trace for register read.	2017-02-24 00:39:54 -05:00
Jean-Philip Desjardins	156352267e	Cleanup.	2017-02-24 00:39:54 -05:00
Jean-Philip Desjardins	ac6a5beab8	Update CPCOND when PCR is written to.	2017-02-24 00:39:54 -05:00
Jean-Philip Desjardins	cf9312a0b8	Add traces for register writes.	2017-02-24 00:39:54 -05:00
Jean-Philip Desjardins	cafe498206	Use preprocessor to generate get and set traces.	2017-02-24 00:39:53 -05:00
Jean-Philip Desjardins	49163195b7	Allow reading D1_CHCR from offset 2.	2016-11-19 17:27:21 -05:00
Jean-Philip Desjardins	4aecd57cb1	Fix register names.	2016-09-06 18:12:06 -04:00
Jean-Philip Desjardins	86f412f0a7	Periodically resume DMA2 transfer. ... Since it can now be paused if MFIFO is active.	2016-07-10 22:47:05 -04:00
Jean-Philip Desjardins	b75858ef17	Allow accessing D8_CHCR from D8_CHCR + 1.	2016-07-10 22:47:05 -04:00
Jean-Philip Desjardins	ad40ee9e03	Fixed DMAC behavior when D*_SADR wraps around.	2015-10-27 00:26:39 -04:00
Jean-Philip Desjardins	eb66e94752	Added support for interleave DMA transfer mode.	2015-10-27 00:26:37 -04:00
Jean-Philip Desjardins	c38bfc2e21	Added enum to define DMA channel IDs.	2015-10-27 00:26:37 -04:00
Jean-Philip Desjardins	720fce8924	Various cleanup.	2015-10-27 00:26:36 -04:00
Jean-Philip Desjardins	31f7d4f4d0	Added some missing DMAC register reads.	2015-08-27 01:49:07 -04:00
Jean-Philip Desjardins	405a85a5f1	Added missing registers reads in DMAC.	2015-08-11 22:51:20 -04:00
Jean-Philip Desjardins	b853181714	Make sure D*_SADR registers are properly masked after being modified.	2015-06-29 00:37:40 -04:00
Jean-Philip Desjardins	1270c1a182	Added some missing DMAC register reads.	2015-06-29 00:26:37 -04:00
Jean-Philip Desjardins	854176d8a5	Added missing DMAC registers in saved states.	2015-06-27 19:52:19 -04:00
Jean-Philip Desjardins	82e3a7d086	Added write masks for some DMAC registers.	2015-05-09 00:34:15 -04:00
Jean-Philip Desjardins	71e8e5d417	Allow reading from D8/D9_SADR.	2015-05-09 00:25:54 -04:00
Jean-Philip Desjardins	fcf1b11f1b	Moved EE and GS specific files in a separate folder.	2015-05-06 00:54:15 -04:00

Renamed from Source/DMAC.cpp (Browse further)