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Generate illegal instruction traps instead of tripping asserts at compile tile.

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This commit is contained in:
Jean-Philip Desjardins 2023-07-11 16:30:52 -04:00
parent eb1818757d
commit 97535eb31e
4 changed files with 31 additions and 34 deletions
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2
Source/COP_FPU.cpp
View file

@ -161,7 +161,7 @@ void CCOP_FPU::CTC1()
}
else
{
assert(0);
Illegal();
}
}

55
Source/MA_MIPSIV.cpp
View file

@ -241,6 +241,16 @@ void CMA_MIPSIV::SetupInstructionTables()
}
}
bool CMA_MIPSIV::Ensure64BitRegs()
{
if(m_regSize != MIPS_REGSIZE_64)
{
Illegal();
return false;
}
return true;
}
void CMA_MIPSIV::CompileInstruction(uint32 address, CMipsJitter* codeGen, CMIPS* ctx, uint32 instrPosition)
{
SetupQuickVariables(address, codeGen, ctx, instrPosition);
@ -539,10 +549,9 @@ void CMA_MIPSIV::DADDI()
//19
void CMA_MIPSIV::DADDIU()
{
if(!Ensure64BitRegs()) return;
if(m_nRT == 0) return;
assert(m_regSize == MIPS_REGSIZE_64);
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[0]));
m_codeGen->PushCst64(static_cast<int16>(m_nImmediate));
m_codeGen->Add64();
@ -552,10 +561,9 @@ void CMA_MIPSIV::DADDIU()
//1A
void CMA_MIPSIV::LDL()
{
if(!Ensure64BitRegs()) return;
if(m_nRT == 0) return;
assert(m_regSize == MIPS_REGSIZE_64);
ComputeMemAccessAddrNoXlat();
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT]));
m_codeGen->PushCtx();
@ -566,10 +574,9 @@ void CMA_MIPSIV::LDL()
//1B
void CMA_MIPSIV::LDR()
{
if(!Ensure64BitRegs()) return;
if(m_nRT == 0) return;
assert(m_regSize == MIPS_REGSIZE_64);
ComputeMemAccessAddrNoXlat();
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT]));
m_codeGen->PushCtx();
@ -686,7 +693,7 @@ void CMA_MIPSIV::SW()
//2C
void CMA_MIPSIV::SDL()
{
assert(m_regSize == MIPS_REGSIZE_64);
if(!Ensure64BitRegs()) return;
ComputeMemAccessAddrNoXlat();
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT]));
@ -697,7 +704,7 @@ void CMA_MIPSIV::SDL()
//2D
void CMA_MIPSIV::SDR()
{
assert(m_regSize == MIPS_REGSIZE_64);
if(!Ensure64BitRegs()) return;
ComputeMemAccessAddrNoXlat();
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT]));
@ -756,10 +763,9 @@ void CMA_MIPSIV::LDC2()
//37
void CMA_MIPSIV::LD()
{
if(!Ensure64BitRegs()) return;
if(m_nRT == 0) return;
assert(m_regSize == MIPS_REGSIZE_64);
ComputeMemAccessPageRef();
m_codeGen->PushCst(0);
@ -813,7 +819,7 @@ void CMA_MIPSIV::SDC2()
//3F
void CMA_MIPSIV::SD()
{
assert(m_regSize == MIPS_REGSIZE_64);
if(!Ensure64BitRegs()) return;
ComputeMemAccessPageRef();
@ -996,10 +1002,9 @@ void CMA_MIPSIV::MTLO()
//14
void CMA_MIPSIV::DSLLV()
{
if(!Ensure64BitRegs()) return;
if(m_nRD == 0) return;
assert(m_regSize == MIPS_REGSIZE_64);
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[0]));
m_codeGen->Shl64();
@ -1009,10 +1014,9 @@ void CMA_MIPSIV::DSLLV()
//16
void CMA_MIPSIV::DSRLV()
{
if(!Ensure64BitRegs()) return;
if(m_nRD == 0) return;
assert(m_regSize == MIPS_REGSIZE_64);
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[0]));
m_codeGen->Srl64();
@ -1022,10 +1026,9 @@ void CMA_MIPSIV::DSRLV()
//17
void CMA_MIPSIV::DSRAV()
{
if(!Ensure64BitRegs()) return;
if(m_nRD == 0) return;
assert(m_regSize == MIPS_REGSIZE_64);
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[0]));
m_codeGen->Sra64();
@ -1204,10 +1207,9 @@ void CMA_MIPSIV::TEQ()
//38
void CMA_MIPSIV::DSLL()
{
if(!Ensure64BitRegs()) return;
if(m_nRD == 0) return;
assert(m_regSize == MIPS_REGSIZE_64);
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
m_codeGen->Shl64(m_nSA);
m_codeGen->PullRel64(offsetof(CMIPS, m_State.nGPR[m_nRD].nV[0]));
@ -1216,10 +1218,9 @@ void CMA_MIPSIV::DSLL()
//3A
void CMA_MIPSIV::DSRL()
{
if(!Ensure64BitRegs()) return;
if(m_nRD == 0) return;
assert(m_regSize == MIPS_REGSIZE_64);
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
m_codeGen->Srl64(m_nSA);
m_codeGen->PullRel64(offsetof(CMIPS, m_State.nGPR[m_nRD].nV[0]));
@ -1228,10 +1229,9 @@ void CMA_MIPSIV::DSRL()
//3B
void CMA_MIPSIV::DSRA()
{
if(!Ensure64BitRegs()) return;
if(m_nRD == 0) return;
assert(m_regSize == MIPS_REGSIZE_64);
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
m_codeGen->Sra64(m_nSA);
m_codeGen->PullRel64(offsetof(CMIPS, m_State.nGPR[m_nRD].nV[0]));
@ -1240,10 +1240,9 @@ void CMA_MIPSIV::DSRA()
//3C
void CMA_MIPSIV::DSLL32()
{
if(!Ensure64BitRegs()) return;
if(m_nRD == 0) return;
assert(m_regSize == MIPS_REGSIZE_64);
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
m_codeGen->Shl64(m_nSA + 32);
m_codeGen->PullRel64(offsetof(CMIPS, m_State.nGPR[m_nRD].nV[0]));
@ -1252,10 +1251,9 @@ void CMA_MIPSIV::DSLL32()
//3E
void CMA_MIPSIV::DSRL32()
{
if(!Ensure64BitRegs()) return;
if(m_nRD == 0) return;
assert(m_regSize == MIPS_REGSIZE_64);
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
m_codeGen->Srl64(m_nSA + 32);
m_codeGen->PullRel64(offsetof(CMIPS, m_State.nGPR[m_nRD].nV[0]));
@ -1264,10 +1262,9 @@ void CMA_MIPSIV::DSRL32()
//3F
void CMA_MIPSIV::DSRA32()
{
if(!Ensure64BitRegs()) return;
if(m_nRD == 0) return;
assert(m_regSize == MIPS_REGSIZE_64);
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
m_codeGen->Sra64(m_nSA + 32);
m_codeGen->PullRel64(offsetof(CMIPS, m_State.nGPR[m_nRD].nV[0]));

2
Source/MA_MIPSIV.h
View file

@ -103,6 +103,8 @@ protected:
typedef std::function<void(uint8)> TemplateParamedOperationFunctionType;
typedef std::function<void()> TemplateOperationFunctionType;
bool Ensure64BitRegs();
void Template_Add32(bool);
void Template_Add64(bool);
void Template_Sub32(bool);

6
Source/MA_MIPSIV_Templates.cpp
View file

@ -24,10 +24,9 @@ void CMA_MIPSIV::Template_Add32(bool isSigned)
void CMA_MIPSIV::Template_Add64(bool isSigned)
{
if(!Ensure64BitRegs()) return;
if(m_nRD == 0) return;
assert(m_regSize == MIPS_REGSIZE_64);
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[0]));
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
m_codeGen->Add64();
@ -55,10 +54,9 @@ void CMA_MIPSIV::Template_Sub32(bool isSigned)
void CMA_MIPSIV::Template_Sub64(bool isSigned)
{
if(!Ensure64BitRegs()) return;
if(m_nRD == 0) return;
assert(m_regSize == MIPS_REGSIZE_64);
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[0]));
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
m_codeGen->Sub64();