mirror of
https://github.com/jpd002/Play-.git
synced 2025-04-28 13:47:57 +03:00
Add proper "empty" return value to GetEffectiveAddress.
Zero is valid and cannot be used as "empty".
This commit is contained in:
parent
e283a2fc79
commit
38d3775a07
13 changed files with 35 additions and 23 deletions
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@ -206,6 +206,10 @@ void CBasicBlock::CompileRange(CMipsJitter* jitter)
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return false;
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return false;
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}
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}
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uint32 target = m_context.m_pArch->GetInstructionEffectiveAddress(&m_context, branchInstAddr, inst);
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uint32 target = m_context.m_pArch->GetInstructionEffectiveAddress(&m_context, branchInstAddr, inst);
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if(target == MIPS_INVALID_PC)
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{
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return false;
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}
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return target == m_begin;
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return target == m_begin;
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}();
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}();
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@ -172,7 +172,7 @@ protected:
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}
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}
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}
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}
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if((branchAddress != 0) && block->HasLinkSlot(LINK_SLOT_BRANCH))
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if((branchAddress != MIPS_INVALID_PC) && block->HasLinkSlot(LINK_SLOT_BRANCH))
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{
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{
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branchAddress &= m_addressMask;
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branchAddress &= m_addressMask;
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const auto linkSlot = LINK_SLOT_BRANCH;
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const auto linkSlot = LINK_SLOT_BRANCH;
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@ -210,7 +210,7 @@ protected:
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virtual void PartitionFunction(uint32 startAddress)
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virtual void PartitionFunction(uint32 startAddress)
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{
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{
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uint32 endAddress = startAddress + MAX_BLOCK_SIZE;
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uint32 endAddress = startAddress + MAX_BLOCK_SIZE;
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uint32 branchAddress = 0;
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uint32 branchAddress = MIPS_INVALID_PC;
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for(uint32 address = startAddress; address < endAddress; address += 4)
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for(uint32 address = startAddress; address < endAddress; address += 4)
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{
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{
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uint32 opcode = m_context.m_pMemoryMap->GetInstruction(address);
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uint32 opcode = m_context.m_pMemoryMap->GetInstruction(address);
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@ -230,7 +230,7 @@ uint32 CMA_MIPSIV::ReflCOPEffeAddr(INSTRUCTION* pInstr, CMIPS* pCtx, uint32 nAdd
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}
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}
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else
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else
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{
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{
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return 0;
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return MIPS_INVALID_PC;
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}
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}
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}
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}
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@ -269,6 +269,7 @@ void CMIPSAnalysis::ExpandSubroutines(uint32 executableStart, uint32 executableE
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if(branchType != MIPS_BRANCH_NORMAL) continue;
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if(branchType != MIPS_BRANCH_NORMAL) continue;
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uint32 branchTarget = m_ctx->m_pArch->GetInstructionEffectiveAddress(m_ctx, address, opcode);
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uint32 branchTarget = m_ctx->m_pArch->GetInstructionEffectiveAddress(m_ctx, address, opcode);
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if(branchTarget == MIPS_INVALID_PC) continue;
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//Check if pointing inside our subroutine. If so, don't bother
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//Check if pointing inside our subroutine. If so, don't bother
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if(branchTarget >= subroutine.start && branchTarget <= subroutine.end) continue;
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if(branchTarget >= subroutine.start && branchTarget <= subroutine.end) continue;
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@ -1,7 +1,6 @@
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#include "MIPSReflection.h"
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#include "MIPSReflection.h"
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#include <string.h>
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#include <string.h>
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#include "MIPS.h"
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class CMIPS;
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using namespace MIPSReflection;
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using namespace MIPSReflection;
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@ -64,7 +63,7 @@ uint32 MIPSReflection::SubTableEffAddr(INSTRUCTION* pInstr, CMIPS* pCtx, uint32
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pInstr = DereferenceInstruction(pInstr->pSubTable, nOpcode);
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pInstr = DereferenceInstruction(pInstr->pSubTable, nOpcode);
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if(pInstr->pGetEffectiveAddress == NULL)
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if(pInstr->pGetEffectiveAddress == NULL)
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{
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{
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return 0;
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return MIPS_INVALID_PC;
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}
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}
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return pInstr->pGetEffectiveAddress(pInstr, pCtx, nAddress, nOpcode);
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return pInstr->pGetEffectiveAddress(pInstr, pCtx, nAddress, nOpcode);
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}
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}
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@ -40,6 +40,7 @@ bool CEeBasicBlock::IsIdleLoopBlock() const
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//Check that the branch target is ourself
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//Check that the branch target is ourself
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uint32 branchTarget = m_context.m_pArch->GetInstructionEffectiveAddress(&m_context, endInstructionAddress, endInstruction);
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uint32 branchTarget = m_context.m_pArch->GetInstructionEffectiveAddress(&m_context, endInstructionAddress, endInstruction);
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if(branchTarget == MIPS_INVALID_PC) return false;
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if(branchTarget != m_begin) return false;
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if(branchTarget != m_begin) return false;
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uint32 compareRs = 0;
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uint32 compareRs = 0;
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@ -1349,12 +1349,12 @@ uint32 CMA_VU::CLower::GetInstructionEffectiveAddress(CMIPS* context, uint32 add
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{
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{
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if(IsLOI(context, address))
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if(IsLOI(context, address))
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{
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{
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return 0;
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return MIPS_INVALID_PC;
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}
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}
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if(opcode == OPCODE_NOP)
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if(opcode == OPCODE_NOP)
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{
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{
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return 0;
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return MIPS_INVALID_PC;
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}
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}
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INSTRUCTION instr;
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INSTRUCTION instr;
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@ -105,7 +105,7 @@ void CVuAnalysis::Analyse(CMIPS* ctx, uint32 begin, uint32 end)
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if(branchType == MIPS_BRANCH_NORMAL)
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if(branchType == MIPS_BRANCH_NORMAL)
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{
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{
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uint32 branchTarget = ctx->m_pArch->GetInstructionEffectiveAddress(ctx, address, lowerInstruction);
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uint32 branchTarget = ctx->m_pArch->GetInstructionEffectiveAddress(ctx, address, lowerInstruction);
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if(branchTarget != 0)
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if(branchTarget != MIPS_INVALID_PC)
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{
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{
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auto subroutine = ctx->m_analysis->FindSubroutine(branchTarget);
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auto subroutine = ctx->m_analysis->FindSubroutine(branchTarget);
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if(subroutine)
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if(subroutine)
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@ -230,9 +230,7 @@ void CVuBasicBlock::CompileRange(CMipsJitter* jitter)
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return false;
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return false;
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}
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}
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uint32 target = m_context.m_pArch->GetInstructionEffectiveAddress(&m_context, branchInstAddr, inst);
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uint32 target = m_context.m_pArch->GetInstructionEffectiveAddress(&m_context, branchInstAddr, inst);
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//TODO: GetInstructionEffectiveAddress should return something else when the EA can't be computed
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if(target == MIPS_INVALID_PC)
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//statically as 0 is a valid address. There's some other implications to this though.
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if(target == 0)
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{
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{
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return false;
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return false;
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}
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}
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@ -321,6 +319,7 @@ bool CVuBasicBlock::CheckIsSpecialIntegerLoop(unsigned int regI) const
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{
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{
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assert(IsConditionalBranch(opcodeLo));
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assert(IsConditionalBranch(opcodeLo));
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uint32 branchTarget = arch->GetInstructionEffectiveAddress(&m_context, address, opcodeLo);
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uint32 branchTarget = arch->GetInstructionEffectiveAddress(&m_context, address, opcodeLo);
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if(branchTarget == MIPS_INVALID_PC) return false;
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if(branchTarget != m_begin) return false;
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if(branchTarget != m_begin) return false;
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}
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}
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else
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else
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@ -70,7 +70,7 @@ BasicBlockPtr CVuExecutor::BlockFactory(CMIPS& context, uint32 begin, uint32 end
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void CVuExecutor::PartitionFunction(uint32 startAddress)
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void CVuExecutor::PartitionFunction(uint32 startAddress)
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{
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{
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uint32 endAddress = startAddress + MAX_BLOCK_SIZE - 4;
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uint32 endAddress = startAddress + MAX_BLOCK_SIZE - 4;
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uint32 branchAddress = 0;
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uint32 branchAddress = MIPS_INVALID_PC;
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for(uint32 address = startAddress; address < endAddress; address += 8)
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for(uint32 address = startAddress; address < endAddress; address += 8)
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{
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{
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uint32 addrLo = address + 0;
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uint32 addrLo = address + 0;
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@ -186,11 +186,14 @@ void CDisAsmWnd::ShowContextMenu(const QPoint& pos)
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{
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{
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char sTemp[256];
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char sTemp[256];
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uint32 nAddress = m_ctx->m_pArch->GetInstructionEffectiveAddress(m_ctx, m_selected, nOpcode);
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uint32 nAddress = m_ctx->m_pArch->GetInstructionEffectiveAddress(m_ctx, m_selected, nOpcode);
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snprintf(sTemp, countof(sTemp), ("Go to 0x%08X"), nAddress);
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if(nAddress != MIPS_INVALID_PC)
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QAction* goToEaAction = new QAction(this);
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{
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goToEaAction->setText(sTemp);
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snprintf(sTemp, countof(sTemp), ("Go to 0x%08X"), nAddress);
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connect(goToEaAction, &QAction::triggered, std::bind(&CDisAsmWnd::GotoEA, this));
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QAction* goToEaAction = new QAction(this);
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rightClickMenu->addAction(goToEaAction);
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goToEaAction->setText(sTemp);
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connect(goToEaAction, &QAction::triggered, std::bind(&CDisAsmWnd::GotoEA, this));
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rightClickMenu->addAction(goToEaAction);
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}
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}
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}
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}
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}
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}
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}
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@ -368,6 +371,7 @@ void CDisAsmWnd::GotoEA()
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if(m_ctx->m_pArch->IsInstructionBranch(m_ctx, m_selected, nOpcode) == MIPS_BRANCH_NORMAL)
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if(m_ctx->m_pArch->IsInstructionBranch(m_ctx, m_selected, nOpcode) == MIPS_BRANCH_NORMAL)
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{
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{
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uint32 nAddress = m_ctx->m_pArch->GetInstructionEffectiveAddress(m_ctx, m_selected, nOpcode);
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uint32 nAddress = m_ctx->m_pArch->GetInstructionEffectiveAddress(m_ctx, m_selected, nOpcode);
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assert(nAddress != MIPS_INVALID_PC);
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if(m_address != nAddress)
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if(m_address != nAddress)
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{
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{
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@ -632,6 +632,7 @@ std::vector<uint32> QtDebugger::FindCallers(CMIPS* context, uint32 address)
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{
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{
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uint32 opcode = context->m_pMemoryMap->GetInstruction(i);
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uint32 opcode = context->m_pMemoryMap->GetInstruction(i);
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uint32 ea = context->m_pArch->GetInstructionEffectiveAddress(context, i, opcode);
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uint32 ea = context->m_pArch->GetInstructionEffectiveAddress(context, i, opcode);
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if(ea == MIPS_INVALID_PC) continue;
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if(ea == address)
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if(ea == address)
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{
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{
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callers.push_back(i);
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callers.push_back(i);
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@ -312,12 +312,15 @@ std::string CQtDisAsmTableModel::GetInstructionMetadata(uint32 address) const
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if(m_ctx->m_pArch->IsInstructionBranch(m_ctx, address, opcode) == MIPS_BRANCH_NORMAL)
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if(m_ctx->m_pArch->IsInstructionBranch(m_ctx, address, opcode) == MIPS_BRANCH_NORMAL)
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{
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{
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uint32 effAddr = m_ctx->m_pArch->GetInstructionEffectiveAddress(m_ctx, address, opcode);
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uint32 effAddr = m_ctx->m_pArch->GetInstructionEffectiveAddress(m_ctx, address, opcode);
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const char* tag = m_ctx->m_Functions.Find(effAddr);
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if(effAddr != MIPS_INVALID_PC)
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if(tag != nullptr)
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{
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{
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disAsm += ("-> ");
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const char* tag = m_ctx->m_Functions.Find(effAddr);
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disAsm += tag;
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if(tag != nullptr)
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commentDrawn = true;
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{
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disAsm += ("-> ");
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disAsm += tag;
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commentDrawn = true;
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}
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}
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}
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}
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}
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}
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}
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