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#pragma once
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2008-11-25 02:00:42 +00:00
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#include "../MIPS.h"
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2009-03-30 04:57:52 +00:00
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#include "../MA_MIPSIV.h"
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2011-06-06 00:18:33 +00:00
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#include "../COP_SCU.h"
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#include "Iop_BiosBase.h"
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#include "Iop_Dev9.h"
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#include "Iop_Dmac.h"
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#include "Iop_Intc.h"
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#include "Iop_RootCounters.h"
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#include "Iop_Speed.h"
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2008-11-25 02:00:42 +00:00
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#include "Iop_SpuBase.h"
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#include "Iop_Spu.h"
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#include "Iop_Spu2.h"
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2012-09-24 02:37:03 +00:00
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#include "Iop_Sio2.h"
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2008-12-24 01:39:03 +00:00
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#include "zip/ZipArchiveWriter.h"
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#include "zip/ZipArchiveReader.h"
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2008-11-25 02:00:42 +00:00
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namespace Iop
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{
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class CSubSystem
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{
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public:
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CSubSystem(bool ps2Mode);
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virtual ~CSubSystem();
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2008-11-25 02:00:42 +00:00
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2018-04-30 21:01:23 +01:00
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void Reset();
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int ExecuteCpu(int);
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bool IsCpuIdle();
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void CountTicks(int);
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2008-11-25 02:00:42 +00:00
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2018-04-30 21:01:23 +01:00
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void NotifyVBlankStart();
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void NotifyVBlankEnd();
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2011-05-05 04:28:11 +00:00
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2018-04-30 21:01:23 +01:00
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void SaveState(Framework::CZipArchiveWriter&);
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void LoadState(Framework::CZipArchiveReader&);
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2008-12-24 01:39:03 +00:00
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2018-04-30 21:01:23 +01:00
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uint8* m_ram;
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uint8* m_scratchPad;
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uint8* m_spuRam;
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CIntc m_intc;
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CRootCounters m_counters;
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CDmac m_dmac;
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CSpuBase m_spuCore0;
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CSpuBase m_spuCore1;
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CSpu m_spu;
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CSpu2 m_spu2;
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CDev9 m_dev9;
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CSpeed m_speed;
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2012-09-24 02:37:03 +00:00
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#ifdef _IOP_EMULATE_MODULES
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CSio2 m_sio2;
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#endif
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CMIPS m_cpu;
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CMA_MIPSIV m_cpuArch;
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CCOP_SCU m_copScu;
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BiosBasePtr m_bios;
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private:
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enum
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{
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SPEED_REG_BEGIN = 0x10000000,
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SPEED_REG_END = 0x1001FFFF,
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HW_REG_BEGIN = 0x1F801000,
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HW_REG_END = 0x1F9FFFFF
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};
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2008-11-25 02:00:42 +00:00
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2019-04-17 13:11:52 -04:00
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void SetupPageTable();
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2018-04-30 21:01:23 +01:00
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uint32 ReadIoRegister(uint32);
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uint32 WriteIoRegister(uint32, uint32);
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2013-03-06 04:42:17 +00:00
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2018-04-30 21:01:23 +01:00
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void CheckPendingInterrupts();
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2017-04-22 21:15:31 -04:00
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2018-04-30 21:01:23 +01:00
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int m_dmaUpdateTicks;
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int m_spuIrqUpdateTicks;
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2012-03-11 20:16:15 +00:00
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};
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}
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